High Tolerance to Gate Misalignment in Low Voltage Gate-Underlap Double Gate MOSFETs

نویسندگان
چکیده

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Low Voltage Squarer Using Floating Gate MOSFETs

A new low-voltage floating gate MOSFET (FGMOS) based squarer using square law characteristic of the FGMOS is proposed in this paper. The major advantages of the squarer are simplicity, rail-to-rail input dynamic range, low total harmonic distortion, and low power consumption. The proposed circuit is biased without body effect. The circuit is designed and simulated using SPICE in 0.25μm CMOS tec...

متن کامل

Strained-Si single-gate versus unstrained-Si double-gate MOSFETs

Self-consistent full-band Monte Carlo simulations are employed to compare the performance of nanoscale strained-Si single-gate (SG) and unstrained-Si double-gate (DG) MOSFETs for a gate length of 25 nm. Almost the same on-current as in the DG-MOSFET can be achieved by strain in a SG-MOSFET for the same gate overdrive. This is due to the compensation of the higher electron sheet density in the t...

متن کامل

Gate Length Scaling and Threshold Voltage Control of Double-Gate MOSFETs

Abstract In the nanoscale regime, the double-gate MOSFET can provide superior short-channel behavior. For this structure, device scaling issues are explored. Gate length scaling will be limited by the ability to control off-state leakage current due to quantum tunneling and thermionic emission between the source and drain as well as band-to-band tunneling between the body and drain. Lateral S/D...

متن کامل

Channel thickness dependency of high-k gate dielectric based double-gate CMOS inverter

This work investigates the channel thickness dependency of high-k gate dielectric-based complementary metal-oxide-semiconductor (CMOS) inverter circuit built using a conventional double-gate metal gate oxide semiconductor field-effect transistor (DG-MOSFET). It is espied that the use of high-k dielectric as a gate oxide in n/p DG-MOSFET based CMOS inverter results in a high noise margin as well...

متن کامل

Numerical Simulation of Nanoscale Double-gate Mosfets

ABSTRACT The further improvement of nanoscale electron devices requires support by numerical simulations within the design process. After a briefly description of our 2D/3D-device simulator SIMBA, the results of the simulation of DG-MOSFETs are represented. Starting from a basic structure with a gate length of 30 nm, a calibration of model parameters was done based on measured values from liter...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: IEEE Electron Device Letters

سال: 2008

ISSN: 0741-3106,1558-0563

DOI: 10.1109/led.2008.920281